cjkas 527215d21a fix: review fixes for the C3 build ... - The C3's default radio pins were GPIO 12-17, which hold its SPI flash. They are now the framework's SPI pins (SCK 4, MISO 5, MOSI 6, CSN 7) with TX 10 and RX 3. A board with pins saved keeps them. - ADR 0003: the amendment links ADR 0006, says the C3 needs chip revision v0.3 or later (CONFIG_ESP32C3_REV_MIN_3), and the Ethernet bullet names the C3. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>		2026-10-28 22:32:37 +01:00
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0001-local-nvs-handles-no-wrapper.md	fix: give every NVS user its own Preferences handle	2026-10-12 20:51:05 +02:00
0002-loop-task-is-the-only-writer-of-the-shade-model.md	fix: review fixes for step 4a	2026-10-27 22:11:54 +01:00
0003-pioarduino-idf55.md	fix: review fixes for the C3 build	2026-10-28 22:32:37 +01:00
0005-one-websocket-protocol.md	fix: web UI client review findings (step 2a)	2026-10-25 18:04:07 +01:00
0006-two-security-modes-eleven-http-routes.md	fix: close the token bypass below a route, review fixes for 4b	2026-10-28 19:39:51 +01:00
0007-no-github-update.md	docs: ADRs 0005-0007 for socket protocol 2	2026-10-22 20:50:33 +02:00