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- The C3's default radio pins were GPIO 12-17, which hold its SPI flash. They are now the framework's SPI pins (SCK 4, MISO 5, MOSI 6, CSN 7) with TX 10 and RX 3. A board with pins saved keeps them. - ADR 0003: the amendment links ADR 0006, says the C3 needs chip revision v0.3 or later (CONFIG_ESP32C3_REV_MIN_3), and the Ethernet bullet names the C3. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> |
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| .. | ||
| adr | ||
| KNOWN_ISSUES.md | ||
| NICE_TO_HAVE.md | ||
| PROTOCOL.md | ||
| SECURITY_PLAN.md | ||