build: add the ESP32-P4 (#29)

For boards such as Waveshare's ESP32-P4-WIFI6-POE-ETH: WiFi through the
board's ESP32-C6 on SDIO (esp-hosted), Ethernet on the P4's RMII MAC with
an IP101.  Not tested on a device: no P4 board was at hand.

- platformio.ini: env esp32p4 (esp32-p4_r3, chip v3.01+) and esp32p4es
  (esp32-p4, the esp32p4_es libraries, chips before v2.0).  An image runs
  on one of the two only, so each has its own release files, chip models
  "p4" and "p4es".  Both keep the OTA slot: at level 2 they leave about
  128 KB of it.
- Ethernet clock mode: stored as eth_clock_id_t in the ESP32's numbering
  and translated by name, like the PHY id.  The P4's eth_clock_mode_t is
  the IDF's emac_rmii_clock_mode_t, whose 0 is a deprecated default; only
  clock in (GPIO 50) translates there.
- P4 Ethernet defaults: the Waveshare wiring (IP101 as TLK110, address 1,
  MDC 31, MDIO 52, reset 51), board type 8.  The ESP32's put MDIO on an
  SDIO pin.
- Settings take pins up to GPIO 54, the P4's last, instead of 48.
- Radio defaults: SPI 32/33/27, CSN 46 (the framework's Waveshare
  variant), TX 2, RX 3.
- Web UI: a Waveshare ESP32-P4-ETH preset, the P4's clock mode, pin lists
  up to GPIO 54 without the pins the C6 link, Ethernet, USB and UART0 use.
- CI builds and releases both, with their ELFs; bootloader at 0x2000.
- ADR 0003: amended.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

test/stubs/ETH.h

@@ -13,4 +13,20 @@ typedef enum {
   ETH_PHY_KSZ8081,
   ETH_PHY_MAX
 } eth_phy_type_t;
+#if defined(CONFIG_IDF_TARGET_ESP32P4)
+// The P4's ETH.h takes the IDF's enum, where 0 is a deprecated default.
+typedef enum {
+  EMAC_CLK_DEFAULT,
+  EMAC_CLK_EXT_IN,
+  EMAC_CLK_OUT
+} emac_rmii_clock_mode_t;
+typedef emac_rmii_clock_mode_t eth_clock_mode_t;
+#else
+typedef enum {
+  ETH_CLOCK_GPIO0_IN,
+  ETH_CLOCK_GPIO0_OUT,
+  ETH_CLOCK_GPIO16_OUT,
+  ETH_CLOCK_GPIO17_OUT
+} eth_clock_mode_t;
+#endif
 #endif