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fix: review fixes for the ESP32-P4 build

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- The pre-v3 build is for chips before v2.0, not v3.0: the esp32p4_es
  libraries stop at v1.99.  The CI label and comments say so, and that no
  build runs on v2.x or v3.00.
- A save refuses a clock mode the chip can't use: ProtoSettings takes
  CLKMode 0-ETH_CLOCK_ID_MAX, 0 only on the P4.  Before, 1-3 saved and
  then stopped Ethernet at the next start.  A range of one value reads
  "must be 0".
- Tests for the pin limit (54 taken, 55 refused) and the clock limits.
- The web UI's P4 pins leave out strapping pin 36 too.
- The preset says ESP32-P4-WIFI6-POE-ETH, the board's name.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
This commit is contained in:
cjkas 2026-10-29 20:10:36 +01:00
parent dfb003d2f7
commit cbeb56d336
10 changed files with 45 additions and 11 deletions
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9
test/test_ethphy_p4/test_ethphy_p4.cpp
View file

@ -32,6 +32,14 @@ static void test_rejects_clock_out() {
TEST_ASSERT_FALSE(ethClockMode(3, mode));
TEST_ASSERT_FALSE(ethClockMode(4, mode));
}
static void test_a_save_takes_clock_in_only() {
// ProtoSettings refuses a CLKMode over this, so a save can't store a mode
// that stops Ethernet at the next start.
eth_clock_mode_t mode;
TEST_ASSERT_EQUAL_UINT8(0, ETH_CLOCK_ID_MAX);
TEST_ASSERT_TRUE(ethClockMode(ETH_CLOCK_ID_MAX, mode));
TEST_ASSERT_FALSE(ethClockMode(ETH_CLOCK_ID_MAX + 1, mode));
}
static void test_clock_pin_is_50() {
TEST_ASSERT_EQUAL_INT8(50, ethClockPin(0));
TEST_ASSERT_EQUAL_INT8(-1, ethClockPin(1));
@ -44,6 +52,7 @@ int main(int, char **) {
RUN_TEST(test_ip101_is_the_tlk110_id);
RUN_TEST(test_clock_in_is_ext_in);
RUN_TEST(test_rejects_clock_out);
RUN_TEST(test_a_save_takes_clock_in_only);
RUN_TEST(test_clock_pin_is_50);
return UNITY_END();
}