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https://github.com/rstrouse/ESPSomfy-RTS.git
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fix: warn of radio pins that block flashing over USB
GPIO2 on the original ESP32, 46 on the S2/S3 and 8 on the C3/C6 don't stop a normal boot, but held at the wrong level at reset they keep esptool from starting the download mode. The WT32-ETH01 wiring puts TX on GPIO2. Each warning now says what the pin does and what to do: move it for a pin that stops the boot, disconnect it to flash for one that only blocks USB. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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parent
658f5eabeb
commit
92e69d599f
6 changed files with 87 additions and 40 deletions
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@ -19,10 +19,18 @@ static void test_gpio0_picks_the_boot_mode() {
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TEST_ASSERT_NOT_NULL(strstr(effect, "download mode"));
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}
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static void test_gpio2_blocks_flashing_over_usb() {
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// It only counts with GPIO0 low, so the board boots, but esptool can't
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// start the download mode while it is high.
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const char *effect = bootPinEffect(2);
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TEST_ASSERT_NOT_NULL(effect);
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TEST_ASSERT_NOT_NULL(strstr(effect, "high"));
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TEST_ASSERT_NOT_NULL(strstr(effect, "USB"));
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}
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static void test_harmless_strapping_pins_are_not_listed() {
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// 2 only matters for the download mode, 5 and 15 set the SDIO timing and
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// the boot log. 5 is the default CSN.
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TEST_ASSERT_NULL(bootPinEffect(2));
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// 5 and 15 set the SDIO timing and quiet the boot log. 5 is the default
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// CSN.
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TEST_ASSERT_NULL(bootPinEffect(5));
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TEST_ASSERT_NULL(bootPinEffect(15));
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}
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@ -34,14 +42,17 @@ static void test_default_radio_pins_are_safe() {
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}
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static void test_other_chips_boot_pins_are_safe_here() {
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TEST_ASSERT_NULL(bootPinEffect(8));
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TEST_ASSERT_NULL(bootPinEffect(9));
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TEST_ASSERT_NULL(bootPinEffect(45));
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TEST_ASSERT_NULL(bootPinEffect(46));
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}
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int main(int, char **) {
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UNITY_BEGIN();
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RUN_TEST(test_gpio12_picks_the_flash_voltage);
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RUN_TEST(test_gpio0_picks_the_boot_mode);
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RUN_TEST(test_gpio2_blocks_flashing_over_usb);
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RUN_TEST(test_harmless_strapping_pins_are_not_listed);
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RUN_TEST(test_default_radio_pins_are_safe);
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RUN_TEST(test_other_chips_boot_pins_are_safe_here);
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