From 298045ec99e6f17c121afd1b3bbf252d718db185 Mon Sep 17 00:00:00 2001 From: cjkas Date: Wed, 28 Oct 2026 21:43:21 +0100 Subject: [PATCH 1/3] build: add the ESP32-C5 The C5 builds like the C6: a debug build with one 3 MB app slot, so it updates over USB. At CORE_DEBUG_LEVEL=2 its image left 3.4 KB of the 1.5 MB OTA slot, under CI's 8 KB. - platformio.ini: env esp32c5 (esp32-c5-devkitc-1). - Chip model "c5", so the updater and releases name its files SomfyController.*.esp32c5.bin. - Radio defaults: the framework's SPI pins (CSN 6, MOSI 8, MISO 9, SCK 10), TX 4, RX 5. - Web UI: GPIO 0-28, without 13-14 (USB) and 15-22 (flash, PSRAM). - CI builds and releases it; its bootloader sits at 0x2000. - ADR 0003: amended. Co-Authored-By: Claude Opus 5.5 --- .github/workflows/build.yaml | 10 +++++++++- data-src/index.js | 1 + docs/adr/0003-pioarduino-idf55.md | 2 +- platformio.ini | 12 ++++++++++++ src/ConfigSettings.cpp | 5 +++++ src/EthPhy.h | 4 ++-- src/Transceiver.cpp | 12 ++++++++++++ src/Utils.h | 2 +- test/test_utils/test_utils.cpp | 2 ++ 9 files changed, 45 insertions(+), 5 deletions(-) diff --git a/.github/workflows/build.yaml b/.github/workflows/build.yaml index d4b1f33..09fa666 100644 --- a/.github/workflows/build.yaml +++ b/.github/workflows/build.yaml @@ -60,7 +60,7 @@ jobs: # fwname: firmware-only binary for OTA updates # obname: onboard image (bootloader + partitions + firmware + littlefs merged) # for flashing a new chip via USB/serial - # addr_bootloader: chip-dependent (ESP32: 0x1000, S3/C3/C6: 0x0) + # addr_bootloader: chip-dependent (ESP32: 0x1000, S3/C3/C6: 0x0, C5: 0x2000) # addr_fs: must match spiffs/littlefs offset in esp32_3MB.csv include: - env: esp32dev @@ -87,6 +87,14 @@ jobs: fwname: SomfyController.ino.esp32c3.bin fsname: SomfyController.littlefs.esp32c3.bin obname: SomfyController.onboard.esp32c3.bin + - env: esp32c5 + name: ESP32-C5 + chip: ESP32-C5 + addr_bootloader: "0x2000" + addr_fs: "0x310000" + fwname: SomfyController.ino.esp32c5.bin + fsname: SomfyController.littlefs.esp32c5.bin + obname: SomfyController.onboard.esp32c5.bin - env: esp32c6 name: ESP32-C6 chip: ESP32-C6 diff --git a/data-src/index.js b/data-src/index.js index 0c3b735..4f00273 100644 --- a/data-src/index.js +++ b/data-src/index.js @@ -2719,6 +2719,7 @@ class Somfy { { name: 's2', maxPins: 46, inputs: [0, 19, 20, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 45], outputs: [0, 19, 20, 26, 27, 28, 29, 30, 31, 32, 45, 46]}, { name: 's3', maxPins: 48, inputs: [19, 20, 22, 23, 24, 25, 27, 28, 29, 30, 31, 32], outputs: [19, 20, 22, 23, 24, 25, 27, 28, 29, 30, 31, 32] }, { name: 'c3', maxPins: 21, inputs: [11, 12, 13, 14, 15, 16, 17, 18, 19, 20], outputs: [11, 12, 13, 14, 15, 16, 17, 21] }, + { name: 'c5', maxPins: 28, inputs: [13, 14, 15, 16, 17, 18, 19, 20, 21, 22], outputs: [13, 14, 15, 16, 17, 18, 19, 20, 21, 22] }, { name: 'c6', maxPins: 23, inputs: [], outputs: [] } ]; diff --git a/docs/adr/0003-pioarduino-idf55.md b/docs/adr/0003-pioarduino-idf55.md index cb06ae1..d7a4da2 100644 --- a/docs/adr/0003-pioarduino-idf55.md +++ b/docs/adr/0003-pioarduino-idf55.md @@ -13,7 +13,7 @@ We moved every firmware env from `espressif32 @ 6.13.0` (Arduino 2.0.17 on ESP-I - **Firmware size.** The ESP32 image grows from 1,382,640 bytes (v3.0.14) to 1,555,472 at `CORE_DEBUG_LEVEL=2`, leaving 17 KB of the 1.5 MB OTA slot. At level 3 it doesn't fit, so release envs build at level 2 (warnings and errors) and debug envs stay at 3. PlatformIO's "Flash:" figure counts ELF sections, not the image, and reads about 45 KB low, so CI checks `firmware.bin` against the app partition and fails under 8 KB free (`.github/size_check.py`). - **No more C3 builds.** Its image grows by 214 KB to 1,651,216 bytes, 76.5 KB over the OTA slot even at level 2. C3 boards stay on the 3.0.x releases. - > **Amended in 4.0.0.** The C3 builds again. Without the old API (ports 8080 and 8081), its image is 1,498,512 bytes at level 2 and leaves 72.6 KB of the OTA slot. + > **Amended in 4.0.0.** The C3 builds again. Without the old API (ports 8080 and 8081), its image is 1,498,512 bytes at level 2 and leaves 72.6 KB of the OTA slot. The C5 is new in 4.0.0 and builds like the C6: a debug build with one 3 MB app slot, updated over USB, since at level 2 its image left only 3.4 KB of the OTA slot. - **Ethernet PHY ids are ours.** Arduino 3.x renumbered `eth_phy_type_t` (`ETH_PHY_GENERIC` is 0). NVS, backups and the web UI keep the Arduino 2.x numbers as `eth_phy_id_t` (`src/EthPhy.h`), translated by name when Ethernet starts. Never cast a stored id to the framework enum. - **Ethernet only on the original ESP32.** Arduino 3.x has the RMII MAC API only where `CONFIG_ETH_USE_ESP32_EMAC` is set. S3 and C6 build without Ethernet. - **Updates roll back until proven.** We override the core's `verifyRollbackLater()` hook to return true, and `loop()` marks the new firmware valid once it has run 60 s and the network is up. A reset before then boots the previous firmware. The LittleFS image an update wrote stays, so the old firmware runs with the new web UI. diff --git a/platformio.ini b/platformio.ini index aaed9a4..86d37d8 100644 --- a/platformio.ini +++ b/platformio.ini @@ -103,6 +103,18 @@ build_flags = ${esp32.build_flags} -DCORE_DEBUG_LEVEL=2 +; Released as a debug build with one 3 MB app slot, so C5 and C6 boards +; update over USB, not OTA. The C5's image leaves 3.4 KB of the 1.5 MB OTA +; slot even at level 2. +[env:esp32c5] +extends = esp32 +board = esp32-c5-devkitc-1 +build_type = debug +board_build.partitions = esp32_huge_app.csv +build_flags = + ${esp32.build_flags} + -DCORE_DEBUG_LEVEL=3 + ; Released as a debug build with one 3 MB app slot, so C6 boards update over ; USB, not OTA. [env:esp32c6] diff --git a/src/ConfigSettings.cpp b/src/ConfigSettings.cpp index 42def2d..3d0cf97 100644 --- a/src/ConfigSettings.cpp +++ b/src/ConfigSettings.cpp @@ -134,6 +134,11 @@ bool ConfigSettings::begin() { case esp_chip_model_t::CHIP_ESP32C3: strcpy(this->chipModel, "c3"); break; + #ifdef CONFIG_IDF_TARGET_ESP32C5 + case esp_chip_model_t::CHIP_ESP32C5: + strcpy(this->chipModel, "c5"); + break; + #endif #ifdef CONFIG_IDF_TARGET_ESP32C6 case esp_chip_model_t::CHIP_ESP32C6: strcpy(this->chipModel, "c6"); diff --git a/src/EthPhy.h b/src/EthPhy.h index 6b2ec46..004b5b4 100644 --- a/src/EthPhy.h +++ b/src/EthPhy.h @@ -5,8 +5,8 @@ #include #endif -// Ethernet needs the RMII MAC, which only the original ESP32 has. The C3, S3 -// and C6 build without it. +// Ethernet needs the RMII MAC, which only the original ESP32 has. The C3, C5, +// S3 and C6 build without it. #if defined(CONFIG_ETH_USE_ESP32_EMAC) && CONFIG_ETH_USE_ESP32_EMAC #define HAS_ETHERNET 1 #else diff --git a/src/Transceiver.cpp b/src/Transceiver.cpp index 9f10d2b..9fe00ba 100644 --- a/src/Transceiver.cpp +++ b/src/Transceiver.cpp @@ -481,6 +481,18 @@ void transceiver_config_t::load() { this->SCKPin = 15; this->CSNPin = 14; break; +#ifdef CONFIG_IDF_TARGET_ESP32C5 + case esp_chip_model_t::CHIP_ESP32C5: + // The framework's default SPI pins (variants/esp32c5). 4 and 5 aren't + // strapping pins. + this->TXPin = 4; + this->RXPin = 5; + this->MOSIPin = 8; + this->MISOPin = 9; + this->SCKPin = 10; + this->CSNPin = 6; + break; +#endif #ifdef CONFIG_IDF_TARGET_ESP32C6 case esp_chip_model_t::CHIP_ESP32C6: // Pinout applicable for the ESP32-C6-WROOM-1 module (ESP32-C6-DevKitC-1-N4) diff --git a/src/Utils.h b/src/Utils.h index f01cf05..ffd3483 100644 --- a/src/Utils.h +++ b/src/Utils.h @@ -85,7 +85,7 @@ const char *wifiAuthModeName(uint8_t authMode); bool otaProven(bool networkUp, unsigned long uptimeMs, unsigned long minUptimeMs); // A release asset's name: "SomfyController..esp32.bin", kind // "ino" for the firmware or "littlefs" for the web UI image, chipModel as in -// ConfigSettings ("" for the ESP32, "s3", "c3", "c6"). +// ConfigSettings ("" for the ESP32, "s3", "c3", "c5", "c6"). void releaseAssetName(char *buf, size_t size, const char *kind, const char *chipModel); // A coredump backtrace as " 0x%08x" per frame. bt holds maxFrames entries and // depth is how many the dump claims are valid. diff --git a/test/test_utils/test_utils.cpp b/test/test_utils/test_utils.cpp index 040d34f..c95a91e 100644 --- a/test/test_utils/test_utils.cpp +++ b/test/test_utils/test_utils.cpp @@ -280,6 +280,8 @@ static void test_releaseAssetName_matches_the_release_workflow() { TEST_ASSERT_EQUAL_STRING("SomfyController.littlefs.esp32s3.bin", buf); releaseAssetName(buf, sizeof(buf), "ino", "c3"); TEST_ASSERT_EQUAL_STRING("SomfyController.ino.esp32c3.bin", buf); + releaseAssetName(buf, sizeof(buf), "ino", "c5"); + TEST_ASSERT_EQUAL_STRING("SomfyController.ino.esp32c5.bin", buf); releaseAssetName(buf, sizeof(buf), "littlefs", "c6"); TEST_ASSERT_EQUAL_STRING("SomfyController.littlefs.esp32c6.bin", buf); } From 0437cd2a88b2c51a3308088969a715fc5efa4c22 Mon Sep 17 00:00:00 2001 From: cjkas Date: Wed, 28 Oct 2026 22:49:42 +0100 Subject: [PATCH 2/3] fix: review fixes for the C5 build - ADR 0003: the C5 gets its own consequence instead of sitting in the ADR 0006 amendment. It names the single-slot table, the chip revision minimum (v1.0, CONFIG_ESP32C5_REV_MIN_FULL=100) and the longer WiFi scans with 5 GHz. - platformio.ini: the [esp32] comment names the C5 and C6 as released debug builds; the C5 comment no longer repeats the C6's. - Transceiver: the C5 comment says why TX and RX are 4 and 5. - CI: the addr_fs comment names both partition tables. Co-Authored-By: Claude Opus 5.5 --- .github/workflows/build.yaml | 3 ++- docs/adr/0003-pioarduino-idf55.md | 3 ++- platformio.ini | 6 +++--- src/Transceiver.cpp | 5 +++-- 4 files changed, 10 insertions(+), 7 deletions(-) diff --git a/.github/workflows/build.yaml b/.github/workflows/build.yaml index 09fa666..730b265 100644 --- a/.github/workflows/build.yaml +++ b/.github/workflows/build.yaml @@ -61,7 +61,8 @@ jobs: # obname: onboard image (bootloader + partitions + firmware + littlefs merged) # for flashing a new chip via USB/serial # addr_bootloader: chip-dependent (ESP32: 0x1000, S3/C3/C6: 0x0, C5: 0x2000) - # addr_fs: must match spiffs/littlefs offset in esp32_3MB.csv + # addr_fs: must match the spiffs offset in the env's partition table + # (0x310000 in both esp32_3MB.csv and esp32_huge_app.csv) include: - env: esp32dev name: ESP32 diff --git a/docs/adr/0003-pioarduino-idf55.md b/docs/adr/0003-pioarduino-idf55.md index ddbbf14..fb87a35 100644 --- a/docs/adr/0003-pioarduino-idf55.md +++ b/docs/adr/0003-pioarduino-idf55.md @@ -13,7 +13,8 @@ We moved every firmware env from `espressif32 @ 6.13.0` (Arduino 2.0.17 on ESP-I - **Firmware size.** The ESP32 image grows from 1,382,640 bytes (v3.0.14) to 1,555,472 at `CORE_DEBUG_LEVEL=2`, leaving 17 KB of the 1.5 MB OTA slot. At level 3 it doesn't fit, so release envs build at level 2 (warnings and errors) and debug envs stay at 3. PlatformIO's "Flash:" figure counts ELF sections, not the image, and reads about 45 KB low, so CI checks `firmware.bin` against the app partition and fails under 8 KB free (`.github/size_check.py`). - **No more C3 builds.** Its image grows by 214 KB to 1,651,216 bytes, 76.5 KB over the OTA slot even at level 2. C3 boards stay on the 3.0.x releases. - > **Amended by [ADR 0006](0006-two-security-modes-eleven-http-routes.md) (4.0.0).** The C3 builds again. Without the old API (ports 8080 and 8081), its image is 1,498,512 bytes at level 2 and leaves 72.6 KB of the OTA slot. It runs on chip revision v0.3 or later only: the framework's C3 libraries are built with `CONFIG_ESP32C3_REV_MIN_3`. Its default radio pins moved off GPIO 12-17, which hold the SPI flash. The C5 is new in 4.0.0 and builds like the C6: a debug build with one 3 MB app slot, updated over USB, since at level 2 its image left only 3.4 KB of the OTA slot. + > **Amended by [ADR 0006](0006-two-security-modes-eleven-http-routes.md) (4.0.0).** The C3 builds again. Without the old API (ports 8080 and 8081), its image is 1,498,512 bytes at level 2 and leaves 72.6 KB of the OTA slot. It runs on chip revision v0.3 or later only: the framework's C3 libraries are built with `CONFIG_ESP32C3_REV_MIN_3`. Its default radio pins moved off GPIO 12-17, which hold the SPI flash. +- **The C5 is updated over USB.** New in 4.0.0. At level 2 its image left 3.4 KB of the OTA slot, under CI's 8 KB, so like the C6 it is released as a debug build with one 3 MB app slot (`esp32_huge_app.csv`), which no OTA can write. The framework's C5 libraries run on chip revision v1.0 or later only (`CONFIG_ESP32C5_REV_MIN_FULL=100`). Its WiFi has 5 GHz too, so the passive scans for the configured network (`src/ESPNetwork.cpp`, 300 ms a channel) cover about 38 channels instead of 13: about 11 s instead of 4 s, depending on the country's channels. - **Ethernet PHY ids are ours.** Arduino 3.x renumbered `eth_phy_type_t` (`ETH_PHY_GENERIC` is 0). NVS, backups and the web UI keep the Arduino 2.x numbers as `eth_phy_id_t` (`src/EthPhy.h`), translated by name when Ethernet starts. Never cast a stored id to the framework enum. - **Ethernet only on the original ESP32.** Arduino 3.x has the RMII MAC API only where `CONFIG_ETH_USE_ESP32_EMAC` is set. S3, C3, C5 and C6 build without Ethernet. - **Updates roll back until proven.** We override the core's `verifyRollbackLater()` hook to return true, and `loop()` marks the new firmware valid once it has run 60 s and the network is up. A reset before then boots the previous firmware. The LittleFS image an update wrote stays, so the old firmware runs with the new web UI. diff --git a/platformio.ini b/platformio.ini index 86d37d8..de180a2 100644 --- a/platformio.ini +++ b/platformio.ini @@ -33,6 +33,7 @@ extra_scripts = board_build.filesystem = littlefs ; Each env adds a CORE_DEBUG_LEVEL: 2 (warnings) for release builds, which ; only fit the 1.5 MB OTA slot without the info logs, 3 for debug builds. +; The C5 and C6 release their debug build, which has a 3 MB slot. build_flags = -DCONFIG_ESP_COREDUMP_ENABLE_TO_FLASH=1 -DCONFIG_ESP_COREDUMP_DATA_FORMAT_ELF=1 @@ -103,9 +104,8 @@ build_flags = ${esp32.build_flags} -DCORE_DEBUG_LEVEL=2 -; Released as a debug build with one 3 MB app slot, so C5 and C6 boards -; update over USB, not OTA. The C5's image leaves 3.4 KB of the 1.5 MB OTA -; slot even at level 2. +; Released like the C6 below. At level 2 its image left 3.4 KB of the +; 1.5 MB OTA slot, under CI's 8 KB. [env:esp32c5] extends = esp32 board = esp32-c5-devkitc-1 diff --git a/src/Transceiver.cpp b/src/Transceiver.cpp index 7c9fe14..c66280c 100644 --- a/src/Transceiver.cpp +++ b/src/Transceiver.cpp @@ -485,8 +485,9 @@ void transceiver_config_t::load() { break; #ifdef CONFIG_IDF_TARGET_ESP32C5 case esp_chip_model_t::CHIP_ESP32C5: - // The framework's default SPI pins (variants/esp32c5). 4 and 5 aren't - // strapping pins. + // The framework's default SPI pins (variants/esp32c5). TX and RX take + // 4 and 5, the LP UART's pins, which nothing here uses; 2, 3, 7 and + // 25-28 are strapping pins and 11-22 hold UART0, USB and the flash. this->TXPin = 4; this->RXPin = 5; this->MOSIPin = 8; From 3bb32c31e47d0b7a3216bdf2058a1c5d3f8caaf7 Mon Sep 17 00:00:00 2001 From: cjkas Date: Thu, 29 Oct 2026 16:21:50 +0100 Subject: [PATCH 3/3] docs: name the C5 among the builds with no OTA slot Co-Authored-By: Claude Opus 5.5 --- src/ConfigSettings.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ConfigSettings.h b/src/ConfigSettings.h index 81c5838..a0b1e6b 100644 --- a/src/ConfigSettings.h +++ b/src/ConfigSettings.h @@ -164,7 +164,7 @@ class ConfigSettings: BaseSettings { char hostname[32] = "ESPSomfyRTS"; char chipModel[10] = "ESP32"; // Whether the partition table has a second app slot for /updateFirmware - // to write. Builds with one 3 MB slot (C6, debug) are flashed over USB. + // to write. Builds with one 3 MB slot (C5, C6, debug) are flashed over USB. bool hasOtaSlot = true; conn_types_t connType = conn_types_t::unset; appver_t fwVersion;