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fix: review fixes for the C5 build

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- ADR 0003: the C5 gets its own consequence instead of sitting in the
  ADR 0006 amendment. It names the single-slot table, the chip revision
  minimum (v1.0, CONFIG_ESP32C5_REV_MIN_FULL=100) and the longer WiFi
  scans with 5 GHz.
- platformio.ini: the [esp32] comment names the C5 and C6 as released
  debug builds; the C5 comment no longer repeats the C6's.
- Transceiver: the C5 comment says why TX and RX are 4 and 5.
- CI: the addr_fs comment names both partition tables.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
This commit is contained in:
cjkas 2026-10-28 22:49:42 +01:00
parent 38b5c31b79
commit 0437cd2a88
4 changed files with 10 additions and 7 deletions
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3
.github/workflows/build.yaml vendored
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@ -61,7 +61,8 @@ jobs:
# obname: onboard image (bootloader + partitions + firmware + littlefs merged)
# for flashing a new chip via USB/serial
# addr_bootloader: chip-dependent (ESP32: 0x1000, S3/C3/C6: 0x0, C5: 0x2000)
# addr_fs: must match spiffs/littlefs offset in esp32_3MB.csv
# addr_fs: must match the spiffs offset in the env's partition table
# (0x310000 in both esp32_3MB.csv and esp32_huge_app.csv)
include:
- env: esp32dev
name: ESP32